Yutaka Niibe

Smartcard ATR by Sigrok with Saleae Logic 16

Yutaka Niibe at

This is a pulseview window of sigrok.
I needed to have a "look" at these signals to debug my smartcard reader.

  • D0 line is power supply of +3V3.
  • D1 line is I/O.
  • D2 line is RST.
  • D3 line is CLK.
We can see that after RST asserted, smartcard emits ATR string to I/O.